Apr 30, 2014

InAlN/GaN heterostructure field-effect transistors on Fe-doped semi-insulating GaN substrates

InAlN/GaN heterostructure field-effect transistors (HFETs) have been grown and fabricated on Fe-doped semi-insulating c-plane GaN substrates. The problematic parasitic leakage caused by interface charge between the epitaxial layers and the GaN substrate as well as any adverse effect of the substrates urface damage caused by the mechanical chemical polish employed on the substrates has been circumvented by using a combination of inductively coupled plasma dry etching and in situ H2 etching. As a result, the current leakage for 100 μm separation mesa-to-mesa was reduced down to 3×10-9 A/mm at 10 V voltage bias for a 320 μm mesa pad width normal to the current flow direction and the corresponding GaN buffer resistivity was about 3.5×108 Ωcm. Owing to the good thermal conductivity of GaN substrates, the HFETs exhibit much less current degradation, compared to those on a sapphiresubstrate, at high drain biases. Likewise, the dc and pulsed I-V characteristics were reasonably similar, suggestive of negligible drain current lag. A dc saturation drain current density of 1.0 A/mm was achieved at zero gate bias. For HFETs with 1.1 μm gate length and 90 μm gate width, the maximum extrinsic dc transconductance was 275 mS/mm.


If you need more information about InAlN/GaN heterostructure field-effect transistors on Fe-doped semi-insulating GaN substrates, please visit:http://www.qualitymaterial.net or send us email at gan@powerwaywafer.com.

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